The traineeship consists in the design and implementation of a digital system on FPGA. The system will be designed using VHDL hardware description language and Xilinx tools and devices, according to the following work plan:
1. Identification of the main building blocks of the design from the description of the functionality and from the system requirements.
2. Proposal of a system architecture, specifying its components and the design hierarchy. […]
4. Description of the hardware design using both VHDL and IP cores, if applicable, and simulation of the functionality.
5. Implementation, debugging...